PRB: Writeback Cache on SH3 May Cause Corrupted Data

With the writeback cache enabled on a SH3 based system, a 16-byte run of zeros aligned at a 16-byte memory address, may appear in place of the expected data.

The cause of this problem is not yet known. Neither Microsoft nor Hitachi have been able to conclusively locate the cause.

The SH3 implementation of the Windows CE operating system provides a configuration setting that allows an OEM developer to control the cache enable bits of the processor. This setting, OEMExtraCCR, should be set in the OEMInit() code in the OEM's Adaptation Layer (OAL).

At this time, it is recommended that the writeback cache be disabled (the cache should be placed in write-through mode)

Microsoft is researching this problem and will post more information in this article when the information becomes available.