Explanation of Big Endian and Little Endian Architecture

This article was previously published under Q102025
This article has been archived. It is offered "as is" and will no longer be updated.
SUMMARY
When designing computers, there are two different architectures forhandling memory storage. They are called Big Endian and Little Endianand refer to the order in which the bytes are stored in memory.Windows NT was designed around Little Endian architecture and was notdesigned to be compatible with Big Endian because most programs arewritten with some dependency on Little Endian.
MORE INFORMATION
These two phrases are derived from "Big End In" and "Little End In."They refer to the way in which memory is stored. On an Intel computer,the little end is stored first. This means a Hex word like 0x1234 isstored in memory as (0x34 0x12). The little end, or lower end, isstored first. The same is true for a four-byte value; for example,0x12345678 would be stored as (0x78 0x56 0x34 0x12). "Big End In" doesthis in the reverse fashion, so 0x1234 would be stored as (0x12 0x34)in memory. This is the method used by Motorola computers and can alsobe used on RISC-based computers. The RISC-based MIPS computers and theDEC Alpha computers are configurable for Big Endian or Little Endian.Windows NT works only in the Little Endian mode on both computers.

Windows NT was designed around Little Endian architecture. TheHardware Abstraction Layer (HAL) is written so that all operatingsystem-related issues are automatically handled. Therefore, it ispossible to create a HAL that could work on Big Endian architecture.The basic problem with porting the code has to do with the way thecode is written for all programs. Code is often written with theassumption that Big Endian or Little Endian is being used. This maynot be specific to the HAL; it could be something as simple as bitmasking for graphics. To clarify this concept more, two programmingexamples follow.

Example 1

   struct   {      WORD y;      WORD x;   } POS;   lparam = (DWORD) POS;				
Basically, there is assumption in the code that Little Endian is beingused. The switching of the bytes is being assumed in the 'C'structure. This is faster on Intel architecture, but will not workwith Big Endian.

Example 2

Another example is a common practice of using bit masks. The followingis an example of defining a bit mask:
   #define BITMASK    0x0008				
This allows you to check if the 4th bit is a 1 if you AND it withanother number. It also allows you to set the 4th bit by OR-ing itwith another value. The problem comes when you OR or AND this withDWORD (Double Word) or anything other than a WORD size value. Thiscauses strange things to happen and unexpected results. You might makeassumptions about how it works with Little Endian, yet it won't workthe same way with Big Endian. A large amount of code is alreadycreated with these assumptions built in.

Note that the PowerPC and Sparc chips are also switchable between LittleEndian and Big Endian. However, the Apple PowerMac implementation of thePowerPC chip is stuck in Big Endian mode. Hence, Windows NT may port tothePowerPC, but probably not to the PowerMac implementation of the PowerPC.
prodnt uuh apple mips
Properties

Article ID: 102025 - Last Review: 12/04/2015 09:35:47 - Revision: 2.1

Microsoft Windows NT Advanced Server 3.1, Microsoft Windows NT Workstation 3.1, Microsoft Windows NT Advanced Server 3.1

  • kbnosurvey kbarchive kbhardware KB102025
Feedback